Design of cost-efficient interconnect processing units (Record no. 159034)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00604nam a2200193Ia 4500 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9781420044713 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 004.1 |
| Item number | P09 |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Coppola, Marcello, et al |
| 245 ## - TITLE STATEMENT | |
| Title | Design of cost-efficient interconnect processing units |
| Remainder of title | spidergon STNoC |
| Statement of responsibility, etc. | by Marcello Coppola, et al |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | Boca Raton |
| Name of publisher, distributor, etc. | CRC Press |
| Date of publication, distribution, etc. | 2009 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | xxii, 261 |
| 490 ## - SERIES STATEMENT | |
| Series statement | System-on-chip design and technologies |
| 500 ## - GENERAL NOTE | |
| General note | Includes CD-ROM |
| 690 ## - LOCAL SUBJECT ADDED ENTRY--TOPICAL TERM (OCLC, RLIN) | |
| Topical term or geographic name as entry element | Network on a chip; ST Microelectronics; Microprocesors; Computer software - architecture |
| 919 ## - | |
| -- | 167976 |
| 904 ## - LOCAL DATA ELEMENT D, LDD (RLIN) | |
| a | Spidergon STNoC |
| 964 ## - | |
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| -- | EE |
| Withdrawn status | Lost status | Damaged status | Not for loan | Home library | Current library | Date acquired | Cost, normal purchase price | Total Checkouts | Full call number | Barcode | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|
| JRD Tata Memorial Library | JRD Tata Memorial Library | 12/01/2009 | 4988.43 | 004.1 P09 | 183612 | Book |
