Normal view MARC view ISBD view

Design of cost-efficient interconnect processing units spidergon STNoC

Coppola, Marcello, et al

Design of cost-efficient interconnect processing units spidergon STNoC by Marcello Coppola, et al - Boca Raton CRC Press 2009 - xxii, 261 - System-on-chip design and technologies .

Includes CD-ROM

ISBN: 9781420044713

Dewey Class. No.: 004.1 / P09

Print
Save record
BIBTEX Dublin Core MARCXML MARC (non-Unicode/MARC-8) MARC (Unicode/UTF-8) MARC (Unicode/UTF-8, Standard) MODS (XML) RIS ISBD
More searches

Search for this title in:
Other Libraries (WorldCat) Other Databases (Google Scholar) Online Stores (Bookfinder.com) Open Library (openlibrary.org)