Design and implementation of a VLSI floating point arithmetic processor.

By: Material type: BookBookSeries: IISc., Dept. of EE, M.Sc. ThesisPublication details: Bangalore IISc. 1990Description: xiii, 144pSubject(s): DDC classification:
  • 621.395 N904 "THESIS"
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Item type Current library Call number Status Date due Barcode
Thesis Thesis JRD Tata Memorial Library 621.395 N904 "THESIS" (Browse shelf(Opens below)) Available T02898

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