000			00604nam a2200193Ia 4500
919			_a202323
020			_a9789353062019 _c
082			_a621.39 _bMAN/D
100			_aMano, M Morris _d
245			_aDigital design _bwith an introduction to the verilog HDL, VHDL, and system Verilog _cby M Morris Mano and Michael D Ciletti
250			_a6th ed. _b
260			_aUttar Pradesh, India _bPearson _c2018
300			_a765p. ; 23cm
500			_aIncludes Index (page no.755-765)
650			_aDigital Systems and Binary Numbers
650			_aDigital Systems
650			_aBinary Numbers
964			_a _b _c _d _epbk _f _g
999			_c201696 _d201696