000 00604nam a2200193Ia 4500
919 _a199018
082 _a621.3973
_bP17 (THESIS)
100 _aPatil, Adarsh
_d
245 _aHeterogeneity aware shared DRAM cache for integrated heterogeneous architectures
_cby Adarsh Patil
260 _aBangalore
_bIISc
_c2017
300 _axv, 95p.
_e
500 _aIncludes CD
500 _aIISc, Dept of CSA, MSc Thesis
653 _aHeterogeneity; IHS architecture
700 _aGovindarajan, R
950 _c
999 _c198420
_d198420