000 00604nam a2200193Ia 4500
919 _a180506
020 _a9780792394297
082 _a621.395
_bN9421 (CEDT)
100 _aRoland, Airiau
245 _aCircuit Synthesis with VHDL
_b
_cby Roland Airiau, Jean-Michel Berge and Vincent Olive
260 _aLondon
_bKluwer Academic Press
_c1994
300 _axvi, 221p
690 _aVHDL (Computer hardware description language); Logic Design-data processing; Computer-aided design
700 _aBerge, Jean-Michel
700 _aOlive, Vincent
964 _a
_b
_c
_d
_e
_f
_gCEDT
999 _c167992
_d167992