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Single event upset in SRAM for the deep sub-micron CMOS technology by Prashant Kumar Saxena by Series: IISc, Dept of ECE, MSc (Engg) Thesis
Material type: Text Text
Publication details: Bangalore Indiand Institute of Science 2002
Availability: Items available for loan: JRD Tata Memorial Library (1)Call number: 621.39732 P02 "THESIS".

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2.
Routing Congestion in VLSI Circuits Estimation and Optimization [electronic resource] by Prashant Saxena, Rupesh S. Shelar and Sachin S S by
Material type: Text Text
Publication details: Boston Springer Science+Business Media, LLC 2007
Availability: Items available for loan: JRD Tata Memorial Library (1)Call number: 621.395 (e-book).

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