TY  - BOOK
AU  - Maly, Wojciech., ed
AU  - Strojwas, Andrzej., ed
ED  - Moore, Will., ed
TI  - Yield modelling and defect tolerance in VLSI
SN  - 085274398X
U1  - 621.38173 
PY  - 1988///
CY  - Philadelphia
PB  - Adam hilger
ER  -