Satyanarayana, J V <br/><br/>
Efficient Design Of Embedded Data Acquisition Systems Based On Smart Sampling 
by J V Satyanarayana 
 - Bangalore  IISc  2014 
 - xxxii, 178p 
 - IISc Dept. of EE PhD Thesis   .
<br/><br/> Includes CD 
<br/><br/><label>Dewey Class. No.: </label>621.398140723  / P14 "THESIS"