TY  - BOOK
AU  - Kala, S
TI  - ASIC Implementation of a high throughput, low latency, memory optimized FFT processor
T2  - IISc, Dept. of CeNSE, MSc Thesis
U1  - 621.384 
PY  - 2012///
CY  - Bangalore
PB  - IISC
N1  - Includes CD
ER  -