Coppola, Marcello, et al <br/><br/>
Design of cost-efficient interconnect processing units  spidergon STNoC 
by Marcello Coppola, et al 
 - Boca Raton  CRC Press  2009 
 - xxii, 261 
 - System-on-chip design and technologies .
<br/><br/> Includes CD-ROM 
<br/><br/><label>ISBN: </label>9781420044713 
<br/><br/><label>Dewey Class. No.: </label>004.1  / P09