Bhat, Chitrasena. <br/><br/>
Design of maximum folded programmable logic arrays for VLSI systems. 

 - Bangalore  IISc.  1988 
 - viii, 130p  incl. bibl. 
 - IISc., Dept. of ECE, Ph.D. Thesis. .
<br/><br/><label>Dewey Class. No.: </label>621.395  / N883 "THESIS"