Gurunath, B. <br/><br/>
Logic minimization algorithms for VLSI applications. 

 - Bangalore :  Indian Institute of Science,  1987. 
 - iv, 120 p. :  ill.  
<br/><br/> Includes references  
<br/><br/>PhD;1987;Electrical Communication Engineering 
<br/><br/><label>Dewey Class. No.: </label>005.1 N87