Efficient hardware architectures for error correcting codes applicable to data storage by Arijit Mondal; advised by Shayan Srinivasa Garani
Material type: BookPublication details: Bengaluru IISc 2021Description: xxii, 166pDissertation: PhD; IISc; 2021Subject(s): DDC classification:- 016 ARI/E
Item type | Current library | Call number | Status | Date due | Barcode |
---|---|---|---|---|---|
Thesis | JRD Tata Memorial Library | 016 ARI/E (Browse shelf(Opens below)) | Available | G30062 |
include bibliographical reference and index
PhD; IISc; 2021
There are no comments on this title.