Rethrottle Execution throttling in the redefine soc architecture by Amar Nath Satrawala
Material type: BookSeries: IISc Dept. of SERC MSc (Engg) THESISPublication details: Bangalore IISc 2009Description: xix, 132pDissertation: Subject(s): DDC classification:- 621.392 P09 "THESIS"
Item type | Current library | Call number | Status | Date due | Barcode |
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Thesis | JRD Tata Memorial Library | 621.392 P09 "THESIS" (Browse shelf(Opens below)) | Available | T07027 |
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