Process variability-aware performance modeling in 65 nm CMOS by Harish B P

By: Material type: BookBookSeries: IISc, Dept of ECE, PhD ThesisPublication details: Bangalore Indian Institute of Science 2006Description: xxiv,166pSubject(s): DDC classification:
  • 621.381520285 P06 'Thesis'
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Item type Current library Call number Status Date due Barcode
Thesis Thesis JRD Tata Memorial Library 621.381520285 P06 'Thesis' (Browse shelf(Opens below)) Available T06278

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