Evaluation of register allocation and instruction scheduling methods in multiple issue processors by Madhavi Gopal Valluri

By: Contributor(s): Material type: BookBookPublication details: Bangalore : Indian Institute of Science, 1999.Description: 102 p. : illDissertation: MSc(Engg);1999;Supercomputer Education and Research CentreDDC classification:
  • 005.453 N99
Dissertation note: MSc(Engg);1999;Supercomputer Education and Research Centre
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Item type Current library Call number Status Date due Barcode
Thesis Thesis JRD Tata Memorial Library 005.453 N99 (Browse shelf(Opens below)) Available T04540

Includes bibliographical references

MSc(Engg);1999;Supercomputer Education and Research Centre

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