Circuit synthesis with VHDL /by Roland Airian, Jean-Michel Berge and Vincent Olive (Record no. 8936)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00604nam a2200193Ia 4500 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 0792394291 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.395 |
| Item number | N941 |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Airiau, Roland. |
| 245 ## - TITLE STATEMENT | |
| Title | Circuit synthesis with VHDL /by Roland Airian, Jean-Michel Berge and Vincent Olive |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | Boston |
| Name of publisher, distributor, etc. | KAP |
| Date of publication, distribution, etc. | 1994 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | xv, 221p |
| 490 ## - SERIES STATEMENT | |
| Series statement | Kluwer International Series in Engineering and Computer Science |
| -- | V.261 |
| 690 ## - LOCAL SUBJECT ADDED ENTRY--TOPICAL TERM (OCLC, RLIN) | |
| Topical term or geographic name as entry element | VHDL (Computer hardware description language)Logic design - Data processing Computer aided design |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Berge, Jean-Michel. |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Olive, Vincent. |
| 919 ## - | |
| -- | 009096 |
| 964 ## - | |
| -- | |
| -- | 0 |
| -- | |
| -- | |
| -- | |
| -- | |
| -- | CEDT |
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