VHDL modeling for digital design synthesis (Record no. 23054)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00604nam a2200193Ia 4500 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 981007851x |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.392 |
| Item number | N961 |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Hsu, Yu-chin. |
| 245 ## - TITLE STATEMENT | |
| Title | VHDL modeling for digital design synthesis |
| Remainder of title | |
| Statement of responsibility, etc. | by Yu-Chin Hsu, Kevin F Tsai, Jessie T Liu |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | The Netherlands |
| Name of publisher, distributor, etc. | kluwer Academic |
| Date of publication, distribution, etc. | 1995 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | xvii, 356p. |
| 690 ## - LOCAL SUBJECT ADDED ENTRY--TOPICAL TERM (OCLC, RLIN) | |
| Topical term or geographic name as entry element | VHDL(Hardware description language) |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Tsai, Kevin. |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Liu, Jessie T. |
| 919 ## - | |
| -- | 024337 |
| Withdrawn status | Lost status | Damaged status | Not for loan | Home library | Current library | Shelving location | Date acquired | Cost, normal purchase price | Total Checkouts | Full call number | Barcode | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Electronic Systems Engineering | Electronic Systems Engineering | Electronic Systems Engineering | 04/08/1997 | 16.50 | 621.392 N961 | 159234 | Reference |
