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Design and development of a microprocessor based power system disturbance recorder.

Suryanarayana, P.V.

Design and development of a microprocessor based power system disturbance recorder. - Bangalore IISc. 1988 - 122p - IISc, Dept. of EE, MSEngg. Thesis. .

Dewey Class. No.: 621.31910287 / N88 "THESIS"

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